The U.S. and China are both converting state capital into domestic AI compute, but they are hitting different bottlenecks. Since 2023, the binding constraint has moved twice along the chain:
Export controls → domestic capacity → advanced packaging and HBM → grid interconnection → cooling → deployed compute
The chip war is not one race with one finish line. Scarcity now sits upstream and downstream of fabrication, the layer that still dominates political attention.
From Export Controls to Deployed Compute
U.S. controls between 2022 and 2026 pushed frontier capacity toward American facilities while forcing China into an accelerated domestic buildout.
TSMC Arizona expanded from a $12 billion fab into a planned multi-fab program exceeding $165 billion, with longer-term frameworks reaching roughly $465 billion. It is already producing chips for Nvidia’s Blackwell processors. The CHIPS Act accelerated deployment, but TSMC supplied most of the capital.
China redirected production inward. SMIC’s advanced-node capacity is projected to reach 60,000 wafers per month in 2026 and 80,000 in 2027, largely for Huawei’s Ascend accelerators.
That expansion did not eliminate China’s constraint. It moved it.
China Hits the Memory Wall
SMIC’s 7nm capacity could supply logic dies for more than one million Ascend units annually. CXMT, however, is projected to produce only about two million HBM stacks in 2026, enough for roughly 250,000 to 300,000 completed Ascend chips.
China can fabricate more logic than it can turn into finished accelerators.
HBM requires high-yield through-silicon-via stacking, precision bonding, and fine-pitch inspection. China lacks these capabilities at scale, while export controls restrict access to critical Western and allied equipment.
CXMT trails global memory leaders by roughly three years. Expanding HBM therefore requires China to overcome bottlenecks in both memory production and the tools needed to manufacture it.
The U.S. Hits the Grid Wall
The U.S. cleared the chip constraint only to encounter power infrastructure.
In PJM, average interconnection time rose from under two years in 2008 to more than eight years in 2025. About 2,300 gigawatts of generation and storage remain in U.S. interconnection queues, exceeding the country’s installed capacity.
Physical equipment is also scarce:
| Grid component | Average lead time | Estimated supply deficit |
|---|---|---|
| Large power transformers | 128 weeks | 30% |
| Generator step-up transformers | 144 weeks | 10% |
Regional generation does not guarantee deployable power. Local substations, transformers, transmission lines, and distribution systems can still block a data center.
China has the inverse structure. It added 543 gigawatts of power capacity in 2024 and could have roughly 400 gigawatts of spare capacity by 2030. Its Eastern Data, Western Computing policy directs workloads toward power-abundant western provinces.
China reaches the HBM and packaging wall first. The U.S. reaches the grid wall after securing chips.
Cooling Becomes a Hard Constraint
Blackwell-class AI racks draw roughly 60 to more than 100 kilowatts, compared with 5 to 10 kilowatts for traditional racks. Air cooling cannot remove the resulting heat flux at sufficient density.
Cold-plate liquid cooling, with thermal resistance as low as 0.01 to 0.05 degrees Celsius per watt, is becoming mandatory for current and next-generation training clusters.
The liquid-cooling market is projected to grow from $5.7 billion in 2026 to $29.2 billion by 2033. Cooling is not ancillary equipment. A data center can secure chips and grid access yet remain unable to operate without thermal retrofits.
Where Scarcity Sits
| Layer | Binding constraint | Primary exposure |
|---|---|---|
| Logic fabrication | Increasingly available | Both countries |
| HBM and advanced packaging | Memory stacks, bonding tools, CoWoS capacity | China and global accelerator supply |
| Grid interconnection | Queues, transformers, substations | United States |
| Cooling | Liquid-cooling capacity and retrofit speed | High-density deployments globally |
Upstream, CoWoS and HBM now constrain accelerator output more than wafer starts. Nvidia holds roughly 60% of global CoWoS capacity for 2026, while lead times run 52 to 78 weeks.
Downstream, grid access and cooling determine whether purchased accelerators become usable compute. Gartner projects that 40% of AI data centers will be power-constrained by 2027.
Fabrication is becoming the least binding of the four major links.
How the Chain Is Mispriced
Electricity Costs Are Socialized
U.S. residential electricity prices rose from about 13 cents per kilowatt-hour before 2019 to 19 cents by the end of 2025. Data-center load growth drives transmission and generation spending that utilities recover through rate bases.
Data centers have added an estimated $23 billion to public electricity bills. The proposed SHIELD Act would shift more grid-infrastructure costs toward large power users.
Compute economics currently understate the infrastructure burden transferred to ratepayers.
HBM and Packaging Capture Oligopoly Rent
SK Hynix and Samsung’s memory divisions reported gross margins above 60% in the fourth quarter of 2025, surpassing TSMC’s foundry margins. Both raised HBM3E contract prices by nearly 20% for 2026.
Nvidia’s Rubin GPU requires eight HBM4 chips, placing memory cost near $4,000 per unit. Three suppliers control a mandatory input for nearly every advanced AI accelerator.
Memory has shifted from a commodity layer into a tax on deployed compute.
Export-Control Pricing Is Political
The U.S. government’s 25% share of H200 sales to China functions as a licensing toll. The price is determined by political access to a restricted corridor, not open-market competition.
Who Extracts the Rent
| Entity | Extraction mechanism |
|---|---|
| TSMC | Foundry margin plus scarcity rent on CoWoS capacity |
| Nvidia | Accelerator design and software margins, despite dependence on external memory and packaging |
| SK Hynix, Samsung, Micron | Oligopoly pricing on HBM |
| Vertiv, Schneider Electric, cooling vendors | Mandatory thermal-infrastructure spending |
| Utilities and grid operators | Regulated returns on generation and transmission investment |
| U.S. Treasury | Direct toll on restricted China-bound accelerator sales |
| Chinese state | Strategic sovereignty despite lower yields and higher unit costs |
| Host communities and ratepayers | Net cost absorption without equivalent claim on compute revenue |
The Synthesis
The U.S. and China are not approaching the same finish line.
China has logic capacity and abundant power but cannot produce enough HBM or advanced packaging to convert that capacity into finished accelerators. The U.S. has frontier chips but cannot connect power and cooling infrastructure quickly enough to deploy them at the desired scale.
The binding scarcity has migrated away from fabrication toward HBM and packaging upstream, then grid access and thermal management downstream.
That migration determines who captures value. Memory suppliers, packaging lines, utilities, and cooling vendors extract the scarcity rent. Industrial policy continues to center fabrication, while residential ratepayers and host communities absorb part of the deployment cost without controlling its pace or economics.