Data centers are the modern equivalent of oil refineries. Refineries convert crude oil into deployable fuel. Data centers convert electricity and silicon into deployable computation. Both are strategic industrial nodes whose capacity affects national power.
The analogy diverges at the unit level. Fuel leaves a refinery carrying chemical energy. Computation leaves a data center as information, while nearly all input electricity remains on site as waste heat. Refinery throughput depends on feedstock processing. Compute throughput depends on continuous heat removal.
The relevant physical identity is:
Electrical input ≈ equipment heat output
The dominant infrastructure constraint is therefore not aggregate electricity alone. It is heat-rejection density: the rate at which a facility can remove waste heat from a concentrated footprint without forcing processors to throttle or shut down.
Heat-Rejection Density
Traditional server racks operated at approximately 5–10 kW. AI training racks exceed 100 kW without a proportional increase in footprint. This raises the heat crossing the same rack, room, and facility boundaries by roughly an order of magnitude.
| Infrastructure regime | Approximate rack power | Cooling requirement |
|---|---|---|
| Traditional enterprise computing | 5–10 kW | Conventional air cooling |
| Dense modern computing | Tens of kilowatts | Intensive airflow management |
| AI training infrastructure | 100+ kW | Liquid cooling |
Air cooling breaks down at high density because a limited volume of air cannot absorb and transport enough heat without extreme airflow, fan power, and temperature gradients.
Liquids have greater volumetric heat capacity and transport heat more effectively. They collect heat near the processors and move it through compact piping instead of forcing the full thermal load through room-scale airflow.
Two architectures dominate:
- Direct-to-chip cooling: Cold plates transfer processor heat into a liquid loop.
- Immersion cooling: Dielectric fluid absorbs heat directly from submerged hardware.
This transition changes rack design, plumbing, coolant distribution, maintenance, water use, and external heat-rejection systems.
Efficiency Does Not Remove the Heat Load
Power Usage Effectiveness measures total facility power relative to computing power:
PUE = total facility power ÷ IT-equipment power
A PUE of 2.0 means the facility consumes one watt of overhead for every watt delivered to computing equipment. A PUE of 1.1 reduces that overhead to approximately 0.1 watt per watt of IT load.
Modern hyperscale facilities can operate near a PUE of 1.1–1.2. This reduces parasitic consumption but does not eliminate processor heat. A 100 MW computing installation near a PUE of 1.1 must still reject approximately 100 MW of heat from its IT equipment, plus the heat associated with facility overhead.
| Improvement | What it reduces | What remains |
|---|---|---|
| Lower fan and pump power | Cooling overhead | IT-equipment heat |
| Better power conversion | Electrical losses | Processor heat |
| Higher server utilization | Idle capacity | Heat from active power |
| Liquid cooling | Thermal resistance and transport limits | Total heat requiring rejection |
| More efficient chips | Energy per computation | Heat from consumed electricity |
Lower PUE improves facility economics. It does not change the basic requirement to reject nearly every watt delivered to active hardware.
Chip Efficiency Changes the Growth Rate
Landauer’s principle places the theoretical minimum energy required to erase one bit at room temperature near 3 × 10⁻²¹ joules. Current processors operate many orders of magnitude above this floor.
Further efficiency gains remain physically possible. Near-term constraints come from engineering, manufacturing, memory movement, interconnects, economics, and development time.
Efficiency reduces the energy required for a fixed quantity of computation. It does not guarantee lower facility power. If demand for computation rises faster than energy per operation falls, total electricity consumption and heat output continue increasing.
Total heat load ≈ computation demanded × energy per unit of computation
Chip efficiency controls the second term. AI demand controls the first.
The Three-Stage Bottleneck
Compute infrastructure must move energy through three linked stages:
| Stage | Function | Binding constraint |
|---|---|---|
| Power delivery | Deliver electricity to processors | Grid capacity, substations, switchgear, transformers |
| Heat capture | Remove heat from chips and racks | Cold plates, thermal interfaces, coolant flow |
| Heat rejection | Transfer heat outside the facility | Chillers, cooling towers, dry coolers, water, ambient conditions |
Failure at any stage strands the hardware. GPUs without sufficient power cannot operate. GPUs without adequate cooling cannot sustain rated performance. A liquid loop that captures heat but cannot reject it outside the facility only relocates the bottleneck.
Cooling is therefore part of the compute supply chain, not auxiliary building equipment. Cold plates, coolant distribution units, pumps, piping, heat exchangers, water systems, chillers, towers, and dry coolers determine how much silicon can operate within a given footprint.
The structural gap is between rising processor power density and the thermal capacity of legacy facilities.
Strategic Implication
Generating heat requires no specialized capability. Every powered processor does it automatically. The scarce capability is capturing, transporting, and rejecting that heat at sufficient density, reliability, and cost.
Heat-rejection infrastructure is the modern equivalent of refining capacity. A country that can deploy it can host dense compute. A country that cannot remains constrained even if it can obtain advanced silicon and generate sufficient electricity.
National compute capacity therefore depends on more than chips and megawatts. It depends on how much heat the physical infrastructure can continuously remove.